In which modern processors continue to surprise me, #1542.

[brooksmoses]

I was just writing up a description of some of the work I've been doing, and describing a bit of code optimization, and wrote the phrase, "stored a 1024-byte array entirely in CPU registers."

And then looked at it sideways, and blinked.

Aren't registers supposed to be ... a lot more limited than that?

Comments

[zwol.livejournal.com]

That'll be Itanium, then?

[brooksmoses]

Actually, this one's the coprocessor on the Cell. Which (if you think of it as a piece by itself) is sort of going in the other direction of modern processors -- lots of cache and registers, but nearly dumb as a brick; no speculative this, no automatic prefetch that. It does only what the compiler tells it, and no more.

[mapache]

G4s already had 32 externally-addressable 128-bit vector registers back in 1999, for a nice 512 bytes (along with another 32 each of 32-bit integer registers and 64-bit floating-point registers). Several-year-old G5s have 80 128-bit registers internally, though you can only address 32 at a time, with rest reserved for register-renaming trickery, but one might be able to make intentional use of that somehow; it's been a while since I took a processor architecture course.